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Design Kits and Libraries for SCMOS-series and BiCMOS2SC

Supported tools

MHS’s Foundry customers benefit from professional Design Kit tools for each of the proposed process technologies. These tools aim at helping the customer to design a complex mixed-signal IC product quickly and safely.

 

  SCMOS3EE, SCMOS3E, SCMOS3RT BiCMOS2SC
Digital Synthesis

SYNOPSIS ® Design Compiler
CADENCE ®  AMBIT SPR
CADENCE ® RTL Compiler

 

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Digital Netlist Simulation

CADENCE ® LVD / NCSIM VHDL
Vital & Verilog

 

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Digital Place & Route

CADENCE ® Silicon Ensemble
CADENCE ® VDIO
CADENCE ® Virtuoso Custom Placer
CADENCE ® Chip Assembly Router
TANNER EDA ® L-EDIT

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Digital / Analog Simulations

CADENCE ® Spectre-Verilog

 

Digital / Analog Front End / Schematic Entry

CADENCE ® Composer
TANNER EDA ® S-EDIT

CADENCE ® Composer
Analog Front End Simulations

CADENCE ® Spectre
SYNOPSIS ® HSPICE
MENTOR Graphics ® ELDO
TANNER EDA ® T-SPICE

CADENCE ® Spectre
SYNOPSIS ® HSPICE
MENTOR Graphics ® ELDO

Full Custom Layout

CADENCE ® Virtuoso
TANNER EDA ® L-EDIT

CADENCE ® Virtuoso
DRC

CADENCE ® Diva
MENTOR Graphics ® Calibre
TANNER EDA ® L-EDIT / HiPer Verify

CADENCE ® Diva
LVS / Extract

CADENCE ® Diva
TANNER EDA ® L-EDIT / HiPer Verify
MENTOR Graphics ® Calibre

CADENCE ® Diva


Mixed-signal and design flow example


Device characterization and modeling

Within the Design Kit, the Electrical Design Rule document summarizes the device parameter specifications and limits.

Our Expert Characterization team has extensively worked to enhance the quality and contents of the device models, in order to cope as closely as possible to the measurements and to the process variations.
Low Voltage CMOS devices are modeled using BSIM3V3 and EKV models (EKV modeling performance is better for sub-threshold characteristics), while Bipolar devices are modeled using a Gummel-Pool model. Dedicated model optimization has been conducted on specific Lateral Drain MOS High Voltage transistors, to take into account the SOA (Safe Operating Area) in the simulations.
A dedicated documentation is published within the Design Kit to graphically compare for each device the modeled and the experimental curves.

The following environmental behaviors have been included in the models (*):

Parameter Voltage dependence
Parameter Temperature dependence
Matching of the first order parameters
1/f Noise
RF behavior
Device dimension parameter dependence
Device limitations (BV, SOA)
First order parameter statistical distribution (Corner cases, Montecarlo)

*) Please note that this list depends on the given technology and device

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