Methodology

Non Disclosure Agreement, Business Agreement
Feasibility: Compatibility Analysis between lines and processes using FMEA approach
Project team build-up (members are MHS staff and Customer staff), Project schedule and objectives set-up
Technology Introduction Plan definition including Pilot Product choice and Qualification Plan
Process and Equipment Installation and Steps Validation
Process and Product Qualification with Customer
Statistical Process Control and Yield-up program
Release to production and ramp-up

Proven successes

1980: CMOS 4 µm from Harris Semiconductor
1984: NMOS 3 µm from Intel
1986-88: CMOS 1.0 µm & 0.8 µm from Cypress
1990: 0.8 µm BICMOS from Cypress
1991: 0.8 µm CMOS analog from CNET lab in France
1993: 0.7 µm CMOS from CNET lab in France
1994: Planarization module from Melco
1998: 0.8 µm/SOI Rad Tol - 10 Mrad from LETI lab in France
1999: 0.5 µm EEPROM from ATMEL US
1999: PBL module from Melco
2000: BICMOS 1.2 µm from ATMEL Germany
2001: Bipolar 1.2 µm from ATMEL Germany
2004: Duplication from Nantes to ATMEL US
2006-7: Transfer/Development of 3 different processes to an US Customer
2007-8: Transfer/Development of 5 different processes to US and Canadian Customers

Example: for 20 mask complexity