Description
MHS SCMOS3EE is a 5V 0.5 µm digital and mixed-signal CMOS technology on a standard epitaxial substrate. This advanced single or double poly, stacked vias, double or triple metal process offers easy embedding optional functions including analog devices, trimming elements, high voltage LDMOS transistors (15V, 20V, 30V, 50V) and EEPROM memory blocks.
The SCMOS3EE process technology family is offered with a set of options which can be selected in accordance with the real IC product needs, and efficiently described in a comprehensive Design Kit.
This mixed-signal process is well suited for designing complex ICs, using for example LV CMOS transistors for the core, HV CMOS devices for driving switches and motors, analog capacitors and resistors for signal amplification and conversion, Schottky diodes and varactors for RF applications and EEPROM memory for calibration data storage and serialization.
Please note that a thick last metal option is also proposed for circuits with higher current drive needs. |
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Key features
 Epitaxial substrate, LOCOS isolation
Diffused wells, N+ doped polySi gates
Silicided Gates and Diffusions
NMOS : L=0.5µm, Vt = 0.65V, IDSN=575µA/µm
PMOS : L=0.5µm, Vt= -0.82V, IDSP=300µA/µm
Interpoly linear capacitor (1.25fF/µm²)
Diffusion capacitor (2.65fF/µm²) ; RF varactor
Nwell (1Kohms/sq) and poly (40 ohms) resistors
High resistive poly resistors (1K or 4Kohms/sq)
RF N-Schottky diode, Zener diode
N&PLDMOS @ Vgsmax=5.5V and Vdsmax=16 or 30V
N&PLDMOS @ Vgsmax=11V and Vdsmax=24, 30, or 50V
Isolated NLV and NLDMOS transistors
Isolated VPNP transistor and Diode, LPNP
N and PHV devices for EEPROM operation
35µm² 1-Poly EEPROM Cell, Data retention >10y @85°C, Endurance>1e5 cycles
PolySi Fuse, Metal Fuse, Antifuse Diode
Applications
LF or UHF RFID tags
Sensor controllers
RF transceivers
Display drivers |